8 07 2011
After Internet birth we have access to many documents that had previously been treated as top-secret, rare and expensive. In possession of them I studied the electronic guts of the MSX and saw that there was nothing complicated in those devices (cartridges, drive interfaces, megaram, mapper …) that were sold.
So, I had an idea after seeing schemes of 2+ Japanese. They have a chip called MSX Engine, which combines many components into a single logical device (PPI, PSG, Mapper, expander slots, etc). I will create a board with my own engine.
The block diagram below shows what is the idea. I using an Altera CPLD to recreate a simple upgrade kit for MSX 2+.
Some will ask me, why are you doing this if there is already one-chip MSX? I answer as follows: the implementation of the One-Chip is a huge kludge. They took several non-optimized implementations of components and included in an FPGA.
The V9938 does not have it implemented a 100% result, the USB reader does not work, the clock does not record the date and time, and some other little things I do not remember now. It’s a cool project but needs to be improved.
My project will have on a board:
- Yamaha V9958 + 128 kB DRAM;
- Memory mapper controller, 1 MB SRAM;
- MegaRAM Controller 512 kB;
- Two slot expander;
- RTC with RP5C01;
- Latch F4 do 2+.